H-Ternary Line Decoder for Digital Data Transmission: Circuit Design and Modelling
نویسنده
چکیده
The design method of the H-ternary line decoder is given. A simulation model of the designed decoder is realised using Circuitmaker package. This is supplemented with a prototype model for operational verification purpose. The decoder consists of a design of the clock recovery circuit. The latter is an essential part for synchronising the decoder with the encoder for the purpose of exact sampling instant of the incoming symbols. The results obtained from both simulation and prototype models are found in quite agreement with each other and with the theory.
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